1. Field of the Invention
The present invention relates generally to a mixer used in various types of modulators, such as orthogonal modulators, demodulators, detectors, multipliers, frequency converters, etc. More specifically, the invention relates to a mixer for mixing a pair of carrier signals 180.degree. out of phase with each other, with a pair of data signals 180.degree. out of phase with each other.
2. Description of the Related Art
Referring to the circuit diagram shown in FIG. 6, a modulator including a conventional mixer has signal input terminals I100, I200 and I300, signal output terminals O100, and 0200, a DC power supply E, choke resistors R100 and R200, a double balanced mixer (hereinafter referred to as "the DBM") 100, a differential amplifier 200, and a constant current circuit 300. A data signal Ss (for example, a sine wave having a frequency fs at 50 kHz) is applied onto the signal input terminal I100. A first carrier signal Sc1 having a frequency higher than the data signal Ss (for example, a sine wave having a frequency fc at 1.5 GHz), is applied onto the signal input terminal I200. Further, a second carrier signal Sc2 180.degree. out of phase with the first carrier signal Sc1, is applied onto the signal input terminal I300. The DBM 100 has four FETs Q100, Q200, Q300 and Q400. The differential amplifier 200 includes two FETs Q500, Q600 and a capacitor C100. The constant current circuit 300 has an FET Q700 and a bias resistor R300. The DBM 100, the differential amplifier 200 and the constant current circuit 300 are connected to each other and are supplied with power from the DC power supply E via the choke resistors R100 and R200.
Referring to the waveform diagram shown in FIG. 7, the operation of the modulator shown in FIG. 6 will now be explained. More specifically, FIG. 7(a) indicates the first and second carrier signals Sc1 and Sc2; FIG. 7(b) designates the first and second data signals Ss1 and Ss2; and FIG. 7(c) represents an amplitude-modulated signal So which is output between the signal output terminals O100 and O200.
The data signal Ss is input to the gate G of the FET Q500 of the differential amplifier 200 via the signal input terminal I100. The total amounts of the currents flowing in the sources S and the drains D of the FETs Q500 and Q600 are each regulated to a constant level by the FET Q700 of the constant current circuit 300. Accordingly, a first data signal Ss1 (indicated by the solid line in FIG. 7(b)) and a second data signal Ss2 (indicated by the dotted line in FIG. 7(b)) 180 degrees out of phase with each other are output from the drain of the FET Q500 and the drain of the FET Q600, respectively. The first data signal Ss1 is supplied to the sources S of the FETs Q100 and Q200 of the DBM 100, while the second data signal Ss2 is fed to the sources S of the FETs Q300 and Q400. On the other hand, the first carrier signal Sc1 (indicated by the solid line in FIG. 7(a)) is supplied to the gates G of the FETs Q100 and Q300, while the second carrier signal (designated by the dotted line in FIG. 7(a)) is fed to the gates G of the FETs Q200 and Q400.
The FET Q100 mixes the first carrier signal Sc1 with the first data signal Ss1 so as to output from the drain D of the FET Q100 a mixed signal So1 including a sideband component in the frequency range (fc.+-.fs). Also, the FET Q200 mixes the second carrier signal Sc2 with the first data signal Ss1 so as to output from the drain D of the FET Q200 a mixed signal So2 including a sideband component in the frequency range (fc.+-.fs). Further, the FET Q300 mixes the first carrier signal Sc1 with the second data signal Ss2 so as to output from the drain D of the FET Q300 a mixed signal So3 including a sideband component in the frequency range (fc.+-.fs). The FET Q400 mixes the second carrier signal Sc2 with the second data signal Ss2 so as to output from the drain D of the FET Q400 a mixed signal So4 including a sideband component in the frequency range (fc.+-.fs).
The mixed signals So1 and So4 are directly coupled and synthesized, so that a mixed signal So1+So4 is output from the signal output terminal O100. On the other hand, the mixed signals So2 and So3 are directly coupled and synthesized, so that a mixed signal So2+So3 is output from the signal output terminal O200. As a result, a balanced amplitude-modulated signal So is output between the signal output terminals O100 and O200.
Since cellular mobile telephones are coming into wide use, there is increasingly a demand for a lower-powered and smaller-sized mixer that is operable at a lower voltage by a single positive power supply.
However, this conventional mixer is connected in series to other circuits (a differential amplifier and a constant current circuit). For rendering this type of mixer operable, it is thus necessary to supply at least 5.5 V from the DC power supply E. The total of 5.5 V equals the sum of the following: a voltage required for making the FETs Q100 to Q400 of the DBM 100 operable (for example, 1.5 V); a voltage required for actuating the FETs Q500 and Q600 of the differential amplifier 200 (for example, 1.5 V); a voltage required for rendering the FET Q700 of the constant current circuit 300 operable (for example, 1.5 V); a voltage drop generated by a current flowing in the bias resistor R300 (for example, 0.5 V); and a voltage drop generated by a current flowing in the choke resistors R100 and R200 (for example, 0.5 V). This makes it difficult to operate the mixer at a lower voltage. Additionally, since a current is necessary to actuate the mixer, it is difficult to satisfy the demand for a lower-powered mixer.
One possible measure to render the DBM 100 operable at a lower voltage may be to insert a capacitor between each element of the DBM 100 and the differential amplifier 200 so as to block DC between those components. Further, a bias circuit may be provided for each of the DBM 100 and the differential amplifier 200, which can thus be individually supplied with power. Additionally, for achieving the downsizing of the mixer, the mixer may be formed as an IC, and the capacitors to be inserted between the DBM 100 and the differential amplifier 200 may be formed within the IC.
However, the above-described techniques not only increase the complexity in the circuit, but also connect the DBM 100 and the differential amplifier 200 in parallel with each other with respect to DC. Since both of the components dissipate current, the total dissipated power is contradictorily increased. Additionally, the capacitance of a capacitor formed within an IC is, in general, restricted to several dozens of pF, which is not sufficient to handle a data signal having a lower frequency.